Job Description:
- Location: Bangalore/Hyderabad
- Experience: 4-10yrs
Skills required:
- Physical verification at block-level& chip-level.
- DRC, LVS DFM, Antenna, Density Fill Routines and other Tape-out sign-off experience is a must.
- Tape-out experience of multiple complex chips at 14 nm or below is required.
- Proficient in planning for and addressing electrical considerations throughout the design process (EM, IR, Noise, etc.).
- Physical verification flow automation exposure will be an added advantage.
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